This invention relates generally to the field of solid state electronic devices. More specifically, it relates to a lead structure for connecting a "surface mount" electronic device ("SMD") to a circuit board.
Miniature solid state electronic devices configured for surface mounting on a circuit board have become quite common. Devices such as integrated circuits and resistive networks, for example, are frequently packaged and configured as leaded "surface mount devices" or leaded "SMDs". In a leaded "SMD", the terminal leads are flattened and horizontal at their ends, for connection to a termination pad on the surface of the circuit board. This is in contrast to "through-hole" devices, in which the leads are formed as "pins" that extend substantially perpendicular to the bottom surface of the package, so that they may be either inserted through locator holes in the circuit board, or plugged into a socket mounted on the board.
Through-hole devices are frequently made in a "dual in-line package" or "DIP" configuration. In the DIP configuration, the electronic components of the device are encapsulated in a substantially rectangular insulating carrier or package, with a row of leads extending from the two longer sides. Surface-mount devices are frequently made with a similar lead arrangement, although they are not commonly referred to as "DIPs". Nevertheless, for the purpose of this specification, reference to a "DIP" configuration will be deemed to either through-hole or surface-mount devices, as the context requires.
Devices having a DIP configuration usually have a fairly large number of leads, frequently more than eight (four pairs), and sometimes as many as 16 or 20 (eight to ten pairs). Consequently, such devices take up a fair amount of board space. Accordingly, configuring the leads of DIP-type surface mount devices to minimize the area occupied ("footprint") has been an important design consideration, especially where it is desired to optimize the use of limited circuit board space by maximizing component density on its surface.
Another consideration in the design of SMDs is the need to address the effects of thermal coefficient of expansion (TCE) differences between the device and the board. Because the device package and the circuit board are of different materials with different TCEs, changes in ambient temperature result in different degrees of expansion and contraction for the package and the board, thereby resulting in stresses applied to the leads that can damage or crack the leads, or degrade the solder joints by which the leads are attached to the board. Furthermore, a power-on condition can create a thermal gradient across the solder joints from the package to the board. Especially in larger (greater than eight leads) DIP-type leaded SMDs, such thermal gradients will often cause some solder joints to expand more than others, thereby resulting in localized stresses than can degrade the solder joints or crack the leads.
The prior art has sought to address the aforementioned problems. For example, U.S. Pat. No. 4,893,172--Matsumoto et al. discloses an electrical connection assembly for connecting a component to a substrate. The connector assembly comprises a plurality of flat, spring-type contacts connected between the component and the substrate. The leads deform vertically and horizontally in response to a TCE mismatch between the component and the substrate. The spring-type contacts are formed in an insulative sheet placed between the component and the substrate. Aside from possible manufacturing complexities and costs, this arrangement appears best adapted for "leadless" components, and may not be especially well-suited for DIP-configuration SMDs.
U.S. Pat. No. 4,739,125--Watanabe et al. discloses elongated leads for an electronic component package, wherein the leads have an intermediate stepped portion (either horizontal or angled) for thermal stress absorption. The terminal lead-out position from the underside of the component package is shifted toward the center of the package to reduce the footprint. The lead is still soldered to the substrate at a point outside the perimeter of the component, since further inward shifting of the lead-out position could create an instability that would result in the component's "rocking" when vibrated.
U.S. Pat. Nos. 4,592,617--Seidler and 4,647,126--Sobota, Jr. disclose S-shaped leads that clip onto an IC chip or the like so as to make contact with a metallized portion of the chip. The S-shaped configuration provides for the absorption of thermal stresses while minimizing the footprint. The clip attachment mechanism, however, is suitable only for attachment to relatively thin chip substrates, and is not well-adapted for attachment to the underside of a DIP carrier by a solder joint.
U.S. Pat. Nos. 3,877,064--Scheingold et al.; 4,827,611--Pai et al.; 5,294,039--Pai et al.; and 5,317,479--Pai et al. disclose S-shaped leads for attaching leadless chip carriers to a circuit board. While the configuration of the leads reduces thermal stresses, it also results in a footprint that is greater than the area of the chip carrier itself, thereby reducing the potential component density on the board. U.S. Pat. Nos. 4,640,499--Hemler et al. and 5,177,326--Goldhammer disclose arrangements for connecting a leadless chip carrier to a circuit board that allow for thermal effects, but which require specialized fixtures on the board that make these arrangements ill-suited for the typical DIP component.
There has thus been an unfulfilled need for a lead arrangement for DIP-configuration SMDs that allows for the absorption of thermally-induced mechanical stresses, and which minimizes the footprint of the device package on the circuit board. It would be additionally advantageous to proved such a lead arrangement that contributes to the mechanical stability of the device.